Fingerprint Dive into the research topics where Electrical Engineering PhD Program is active. These topic labels come from the works of this organization's members. Together they form a unique fingerprint.

Internet Engineering & Materials Science
Data storage equipment Engineering & Materials Science
Semantics Engineering & Materials Science
Robots Engineering & Materials Science
Servers Engineering & Materials Science
Scheduling Engineering & Materials Science
Costs Engineering & Materials Science
Hardware Engineering & Materials Science

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Research Output 1972 2019

19.4 An Adaptive Clock Management Scheme Exploiting Instruction-Based Dynamic Timing Slack for a General-Purpose Graphics Processor Unit with Deep Pipeline and Out-of-Order Execution

Jia, T., Joseph, R. E. & Gu, J., Mar 6 2019, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 318-320 3 p. 8662389. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2019-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Pipelines
Error detection
Program processors
Networks (circuits)

A calculus for Esterel: if can, can. if no can, no can

Florence, S. P., You, S-H., Tov, J. A. & Findler, R., 2019, Proceedings of the ACM on Programming Languages: POPL 2019. Vol. 3. 61

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Semantics
Nuclear power plants
Wire
Networks (circuits)
1 Citation (Scopus)

A combined arithmetic-high-level synthesis solution to deploy partial carry-save radix-8 booth multipliers in datapaths

Del Barrio, A. A., Hermida, R. & Memik, S. O., Feb 1 2019, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 66, 2, p. 742-755 14 p., 8451942.

Research output: Contribution to journalArticle

Adders
Energy utilization
High level synthesis