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Personal profile

Education/Academic qualification

Electrical and Computer Engineering, BS, Carnegie Mellon University

Electrical Engineering, MA, Princeton University

Electrical Engineering, PhD, Princeton University

Research interests

  • Computer architecture
  • Microprocessor design for reliability and variability tolerance
  • Power-aware computing

Fingerprint Dive into the research topics where Russell E Joseph is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

  • 2 Similar Profiles
Microprocessor chips Engineering & Materials Science
Clocks Engineering & Materials Science
Networks (circuits) Engineering & Materials Science
Electric potential Engineering & Materials Science
Timing circuits Engineering & Materials Science
Power Management Mathematics
Hardware Engineering & Materials Science
Embedded systems Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Grants 2004 2022

Research Output 2001 2019

  • 955 Citations
  • 25 Conference contribution
  • 8 Article
  • 2 Conference article

19.4 An Adaptive Clock Management Scheme Exploiting Instruction-Based Dynamic Timing Slack for a General-Purpose Graphics Processor Unit with Deep Pipeline and Out-of-Order Execution

Jia, T., Joseph, R. E. & Gu, J., Mar 6 2019, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 318-320 3 p. 8662389. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2019-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Pipelines
Error detection
Program processors
Networks (circuits)
Microprocessor chips
Clocks
Phase locked loops
Energy conservation
Pipelines

Time squeezing for tiny devices

Fan, Y., Campanoni, S. & Joseph, R. E., Jun 22 2019, ISCA 2019 - Proceedings of the 2019 46th International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., p. 657-670 14 p. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Embedded systems
Transparency
Energy conservation
Energy utilization
2 Citations (Scopus)

An Instruction Driven Adaptive Clock Phase Scaling with Timing Encoding and Online Instruction Calibration for a Low Power Microprocessor

Jia, T., Joseph, R. E. & Gu, J., Oct 16 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference. Institute of Electrical and Electronics Engineers Inc., p. 158-161 4 p. 8494244. (ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

microprocessors
clocks
Microprocessor chips
Clocks
coding

Cocoa: Synergistic cache compression and error correction in capacity sensitive last level caches

Yan, C. & Joseph, R. E., Oct 1 2018, MEMSYS 2018 - Proceedings of the International Symposium on Memory Systems. Association for Computing Machinery

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cocoa
Error correction
Electric potential
Static random access storage
Dynamic random access storage