Grants per year
Personal profile
Education/Academic qualification
Computer Science, PhD, University of California, Los Angeles
… → 2003
Electrical and Computer Engineering, MS, Northwestern University
… → 2000
Electrical and Electronic Engineering, BS, Bogazici University
… → 1998
Research interests
- Design Automation
- Power and energy aware memory systems
- Thermal aware design of circuits and systems
- Thermal sensing and cooling systems for high performance systems
Fingerprint Dive into the research topics where Seda Ogrenci Memik is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 11 Similar Profiles
Field programmable gate arrays (FPGA)
Engineering & Materials Science
Scheduling
Engineering & Materials Science
Clocks
Engineering & Materials Science
Data flow graphs
Engineering & Materials Science
Temperature control
Engineering & Materials Science
Dynamic random access storage
Engineering & Materials Science
Temperature
Engineering & Materials Science
Thermocouples
Engineering & Materials Science
Network
Recent external collaboration on country level. Dive into details by clicking on the dots.
Grants 2004 2019
Testing and Characterization for Pattern Recognition ASIC Development
Fermi Research Alliance, LLC, Fermi National Accelerator Laboratory, Department of Energy
11/21/17 → 12/31/19
Project: Research project
Application specific integrated circuits
Pattern recognition
Luminance
Data storage equipment
Testing
Cooling
Hot Temperature
Data storage equipment
Costs
Dynamical systems
SHF: Small:Thermal Monitoring in 3D Integrated Circuits with Bimetallic Thin Film Thermocouples
7/15/14 → 6/30/18
Project: Research project
Thermocouples
Thin films
Monitoring
Integrated circuits
Seebeck coefficient
REU Supplement for SHF: Small:Thermal Monitoring in 3D Integrated Circuits with Bimetallic Thin Film Thermocouples
Grayson, M. A., Memik, S. O. & Memik, S. O.
7/15/14 → 6/30/18
Project: Research project
Thermocouples
Thin films
Monitoring
Integrated circuits
Seebeck coefficient
Power and Thermal Analysis of Custom Chips for Real Time Data Processing in High Energy Physics (HEP) Experiments
Universities Research Association, Inc.
7/1/14 → 6/30/15
Project: Research project
High energy physics
Thermoanalysis
Experiments
Colliding beam accelerators
Integrated circuits
Research Output 2000 2019
A combined arithmetic-high-level synthesis solution to deploy partial carry-save radix-8 booth multipliers in datapaths
Del Barrio, A. A., Hermida, R. & Memik, S. O., Feb 1 2019, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 66, 2, p. 742-755 14 p., 8451942.Research output: Contribution to journal › Article
Adders
Energy utilization
High level synthesis
Minimizing Thermal Variation in Heterogeneous HPC Systems with FPGA Nodes
Luo, Y., Wang, X., Memik, S. O., Memik, G., Yoshii, K. & Beckman, P., Jan 16 2019, Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018. Institute of Electrical and Electronics Engineers Inc., p. 537-544 8 p. 8615736. (Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Field programmable gate arrays (FPGA)
Particle accelerators
Learning systems
Hot Temperature
Cooling
8
Citations
(Scopus)
Machine Learning-Based Temperature Prediction for Runtime Thermal Management Across System Components
Zhang, K., Guliani, A., Memik, S. O., Memik, G., Yoshii, K., Sankaran, R. & Beckman, P., Feb 1 2018, In : IEEE Transactions on Parallel and Distributed Systems. 29, 2, p. 405-419 15 p., 7995115.Research output: Contribution to journal › Article
Temperature control
Learning systems
Temperature
Linear regression
Neural networks
1
Citation
(Scopus)
Multi-Vdd design for content addressable memories (CAM): A power-delay optimization analysis
Joshi, S., Li, D., Memik, S. O., Deptuch, G., Hoff, J., Jindariani, S., Liu, T., Olsen, J. & Tran, N., Sep 1 2018, In : Journal of Low Power Electronics and Applications. 8, 3, 25.Research output: Contribution to journal › Article
Associative storage
Electric power utilization
Foundries
Fabrication
Testing
1
Citation
(Scopus)
A content addressable memory with multi-Vdd scheme for low power tunable operation
Joshi, S., Li, D., Ogrenci-Memik, S., Deptuch, G., Hoff, J., Jindariani, S., Liu, T., Olsen, J. & Tran, N., Sep 27 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017. Institute of Electrical and Electronics Engineers Inc., p. 401-404 4 p. 8052945. (Midwest Symposium on Circuits and Systems; vol. 2017-August).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Associative storage
Foundries
Pattern recognition
Testing
Electric potential