Grants per year
Personal profile
Research Interests
Simone's main research areas are compilers and virtual machines, with special interest in computer architecture, runtime systems, operating systems, and programming languages. Simone started the HELIX research project at Harvard University in 2010 as a post-doc working with Profs. David Brooks and Gu-Yeon Wei. HELIX uses static and dynamic compilation, run-time optimization, and architecture specialization to extract coarse-grained parallelism for many-core architectures from complex "sequential" code.
Education/Academic qualification
Information Technologies, PhD, Polytechnic University of Milan
Computer Engineering, MS, Polytechnic University of Milan
Computer Engineering, BS, Polytechnic University of Milan
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Grants
- 2 Active
SHF: Small: The Compiler-Architecture Solution to the Data Dependent, Circuit-Level Critical-Paths Variations
10/1/19 → 9/30/22
Project: Research project
CSR: Medium: Collaborative Research: Interweaving the Parallel Software/Hardware Stack
Campanoni, S., Dinda, P. A. & Hardavellas, N.
9/1/18 → 8/31/21
Project: Research project
Research Output
Time squeezing for tiny devices
Fan, Y., Campanoni, S. & Joseph, R. E., Jun 22 2019, ISCA 2019 - Proceedings of the 2019 46th International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., p. 657-670 14 p. (Proceedings - International Symposium on Computer Architecture).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1
Scopus
citations
Workload Characterization of Nondeterministic Programs Parallelized by STATS
Deiana, E. A. & Campanoni, S., Apr 22 2019, Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019. Institute of Electrical and Electronics Engineers Inc., p. 190-201 12 p. 8695670. (Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Compiler-guided instruction-level clock scheduling for timing speculative processors
Fan, Y., Jia, T., Gu, J., Campanoni, S. & Joseph, R. E., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., a40. (Proceedings - Design Automation Conference; vol. Part F137710).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
3
Scopus
citations
Temporal Approximate Function Memoization
Tziantzioulis, G., Hardavellas, N. & Campanoni, S., Jul 1 2018, In : IEEE Micro. 38, 4, p. 60-70 11 p., 8430631.Research output: Contribution to journal › Article
4
Scopus
citations
Unconventional parallelization of nondeterministic applications
Deiana, E. A., St Amour, V., Dinda, P. A., Hardavellas, N. & Campanoni, S., Mar 19 2018, ASPLOS 2018 - 23rd International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 432-447 16 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2
Scopus
citations