Collaborative Research: PPoSS: Planning: Unifying Software and Hardware to Achieve Performant and Scalable Zero-cost Parallelism in the Heterogeneous Future

Parallelism should come at zero-cost, allowing every developer to always start with the assumption of parallelism instead of being forced to alight on it once performance demands it. Considerable progress has been made in achieving this vision on the language and training front—it has been demonstrated that sophomores can learn basic data structures and algorithms in a “parallel first” model enabled by a high-level parallel language. However, achieving both high productivity and high performance on current and future heterogeneous systems requires innovation throughout the hardware/software stack. Working as two independent groups, this team has made progress. One thrust of work has focused on high-level parallel languages and the theory and practice of achieving provable and predictable performance within them. Another thrust of work has focused on rethinking the roles of and abstractions at the compiler, run-time, operating system, and architectural levels within the specific context of parallel execution models. The goal of the proposed planning project is to integrate these two groups, and lay the groundwork for a joint effort that will span from theory to architecture. In the team’s initial discussions, obvious synergies have emerged. One example, looking “theory down”, is implementing theoretically optimal work-stealing and other fine-grain scheduling policies, which is often thwarted by the limitations of a traditional OS (e.g. Linux). However, such implementation is well-matched to a specialized OS that can mediate more appropriate hardware access. Another example, looking “architecture up”, is that hardware and OS features such as specialized functional units, relaxed memory models, pure-kernel execution, and real-time scheduling, are difficult to leverage within traditional, low-level parallelism models (e.g., OpenMP). However, such mechanisms are wellmatched to high-level parallel languages, and can even serve as enabler for their features.