SHF: Small:Thermal Monitoring in 3D Integrated Circuits with Bimetallic Thin Film Thermocouples

Project: Research project

Project Details


Integrated circuit (IC) performance and energy-efficiency is limited by potentially catastrophic thermal loads from increased power densities under ever faster clocking speeds. Thermal challenges are becoming evermore pronounced in 3D IC integration. Existing technologies for thermal monitoring require additional power to measure the local temperature in the chip and suffer from inaccuracies due to process variation (diode based sensors) or use up significant amounts of silicon real estate (digital thermal sensors). Preliminary experimental work by the PIs already demonstrated prototypes for thermal sensors using lithographically patterned (Ni-Cr) and (Cu-Constantan) thin film thermocouples. Initial theoretical work has shown thermal mapping with such systems can tolerate large process variations yet deliver highly accurate thermal maps within 1?C. However, significant challenges remain in the basic science of these thermocouple metals as a function of layer thickness, since thin film Seebeck coefficients are known to differ significantly from bulk. Experiments will be undertaken to investigate the dependence of the Seebeck coefficient on film thickness, bimetallic interface quality, and processing technique, as well as on the choice of various candidate metals for thermocouples. Preliminary samples using integrated resistive heater elements on semiconductor substrates will simulate hot spots underneath arrays of bimetallic thermocouples, generating thermal maps with high spatial resolution. Theoretical work will model on-chip integration for such thermal elements to identify how thermal measurements can best be used to regulate and optimize chip performance. Design optimizations for effective integration and power efficiency will be developed. Finally, a custom designed prototype IC will have bimetallic sensor layers added in-house, and the performance of this IC/thermocouple integrated system will be tested. Keywords: sustainable computing; thermal management; temperature sensing; thermocouple The bimetallic thermocouple technology proposed here would establish a purely passive technology for IC temperature sensing requiring no input power to generate thermal signals, while being process invariant, relying on the intrinsic materials parameters of metals. These advantages will allow for highly accurate, high density thermal maps of critical performance regions of the IC, allowing more energy-efficient dynamic resource management. This thermocouple solution will also permit independent optimization of IC silicon layout and thermal monitoring layout as the latter is removed from the silicon layer. First, our proposed design offers a cost-effective way to generate a run-time, spatially detailed thermal map of the chip, allowing many dynamic power and performance optimization techniques proposed for high performance ICs to fullfil their potential. Second, the decreased yield in high performance chips is a growing concern that directly impacts the multi-billion dollar semiconductor industry. Our proposed thermal mapping will integrate a diagnostic tool for future technologies to monitor the thermal impact of process variation, thereby increasing yield levels due to better characterization of emerging process technology. Preliminary ideas put forth by the PIs have already led to one patent application and to publications co-authored by REU-funded undergraduate researchers. We will continue to train graduate and undergraduate students in the basic research that underlies creative technological developments in industry. The PIs will conti
Effective start/end date7/15/146/30/18


  • National Science Foundation (CCF-1422489)


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