Testing and Characterization for Pattern Recognition ASIC Development

Project: Research project

Description

Extremely fast pattern recognition capabilities are necessary to find and fit
billions of tracks at the hardware trigger level produced every second
anticipated at high luminosity LHC (HL-LHC) running conditions.
Associative Memory (AM) based approaches for fast pattern recognition
have been proposed as a potential solution to the tracking trigger. However,
at the HL-LHC, there is much less time available and speed performance
must be improved over previous systems while maintaining a comparable
number of patterns. The Vertically Integrated Pattern Recognition
Associative Memory (VIPRAM) Project at Fermilab aims to achieve the
target pattern density and performance goal using 3DIC technology.
StatusActive
Effective start/end date11/21/177/31/19

Funding

  • Fermi Research Alliance, LLC, Fermi National Accelerator Laboratory (PO# 640728 // E9935-5264-02)
  • Department of Energy (PO# 640728 // E9935-5264-02)

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Application specific integrated circuits
Pattern recognition
Luminance
Data storage equipment
Testing
Hardware