A 65nm Implantable Gesture Classification SoC for Rehabilitation with Enhanced Data Compression and Encoding for Robust Neural Network Operation Under Wireless Power Condition

Two million amputee patients in the US rely on prosthetic devices for assistance or rehabilitation. Compared with skin-mounted devices, muscle implantable devices offer better signal quality, lower noise inference, less wires and skin irritation. In prior works, a near-infrared powered neural recoding system was demonstrated with optical light TX/RX [1]. An Ultrasound powered neural recorder with AM backscatter was presented [2]. Stimulus systems powered by on/off-chip RF coil via inductive link were also developed [3]-[5]. However, prior implantable systems only perform neural recording with neural signals transferred to external devices for further classification. As in Fig. 1, the transmission of raw neural signals consumes high power and suffers from high bit errors. In addition, external devices may not meet the millisecond classification latency needed for real-time prosthetic control. Hence, a fully integrated solution with embedded classifiers for EMG-based gesture classification offers significant benefits of reduced transmission efforts, low latency, and low error rate. However, a neural network (NN) classifier under wireless power poses challenges of robustly sending weights into the device under noisy conditions. This work, for the first time, presents a fully integrated implantable wireless powered SoC with an embedded NN classifier. The contributions of this work include (1) a wireless powered SoC with NN classifiers and on-chip coil is presented paving the way to embed AI techniques into implantable devices; (2) To reduce the NN weight for sending into the chip at startup, Huffman coding and low-rank singular value decomposition (SVD) techniques are implemented reducing data volume by 29%; (3) New activity detection for NN computing and adaptive power control under unstable wireless power are developed improving power efficiency of the system by 45%; (4) A unique data encoding strategy is also utilized to reduce the bit error rate by orders of magnitudes.