A Cu interconnect process for the 130 nm logic process technology generation using dual damascene copper interconnects and fluorosilicate glass (FSG) was described. The technology exhibited 30% lower sheet resistances at the same metal pitch due to use of Cu with higher aspect ratios. It achieved minimal erosion due to use of the chemical mechanical polishing (CMP) process, and demonstrated high yield on both 200 nm and 300 nm wafers.
ASJC Scopus subject areas
- Chemical Engineering(all)