TY - JOUR
T1 - A Cu interconnect process for the 130 nm process technology node
AU - Moon, Peter
AU - Allen, C.
AU - Anand, N.
AU - Austin, D.
AU - Bramblett, T.
AU - Fradkin, M.
AU - Fu, S.
AU - Hussein, M.
AU - Jeong, J.
AU - Lo, C.
AU - Ott, A.
AU - Smith, P.
AU - Rumaner, L.
N1 - Funding Information:
This study was supported by grants from Fundação de Amparo à Pesquisa do Estado de Minas Gerais (FAPEMIG , grant PPM-00161-13 ) and Conselho Nacional do Desenvolvimento Científico e Tecnológico (CNPq - grants 309073/2011-1 and 476668/2012-3 ), Brazil, and from Dutch Heart Foundation (Student Grant of LR), The Netherlands .
PY - 2001
Y1 - 2001
N2 - A Cu interconnect process for the 130 nm logic process technology generation using dual damascene copper interconnects and fluorosilicate glass (FSG) was described. The technology exhibited 30% lower sheet resistances at the same metal pitch due to use of Cu with higher aspect ratios. It achieved minimal erosion due to use of the chemical mechanical polishing (CMP) process, and demonstrated high yield on both 200 nm and 300 nm wafers.
AB - A Cu interconnect process for the 130 nm logic process technology generation using dual damascene copper interconnects and fluorosilicate glass (FSG) was described. The technology exhibited 30% lower sheet resistances at the same metal pitch due to use of Cu with higher aspect ratios. It achieved minimal erosion due to use of the chemical mechanical polishing (CMP) process, and demonstrated high yield on both 200 nm and 300 nm wafers.
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M3 - Conference article
AN - SCOPUS:0035554937
SN - 1048-0854
SP - 39
EP - 41
JO - Advanced Metallization Conference (AMC)
JF - Advanced Metallization Conference (AMC)
T2 - Advanced Metallization Conference 2001 (AMC 2001)
Y2 - 8 October 2001 through 11 October 2001
ER -