A methodology for power characterization of associative memories

Dawei Li, Siddhartha Joshi, Seda Ogrenci-Memik, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Content Addressable Memories (CAM) have become increasingly more important in applications requiring high speed memory search due to their inherent massively parallel processing architecture. We present a complete power analysis methodology for CAM systems to aid the exploration of their power-performance trade-offs in future systems. Our proposed methodology uses detailed transistor level circuit simulation of power behavior and a handful of input data types to simulate full chip power consumption. Furthermore, we applied our power analysis methodology on a custom designed associative memory test chip. This chip was developed by Fermilab for the purpose of developing high performance real-Time pattern recognition on high volume data produced by a future large-scale scientific experiment. We applied our methodology to configure a power model for this test chip. Our model is capable of predicting the total average power within 4% of actual power measurements. Our power analysis methodology can be generalized and applied to other CAM-like memory systems and accurately characterize their power behavior.

Original languageEnglish (US)
Title of host publicationProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages491-498
Number of pages8
ISBN (Electronic)9781467371650
DOIs
StatePublished - Dec 14 2015
Event33rd IEEE International Conference on Computer Design, ICCD 2015 - New York City, United States
Duration: Oct 18 2015Oct 21 2015

Publication series

NameProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015

Other

Other33rd IEEE International Conference on Computer Design, ICCD 2015
CountryUnited States
CityNew York City
Period10/18/1510/21/15

Keywords

  • Content addressable memory (CAM)
  • NAND cell
  • NOR cell
  • Pattern Recognition
  • Ternary cell
  • VLSI circuits
  • digital electronic circuits
  • power modeling

ASJC Scopus subject areas

  • Computer Graphics and Computer-Aided Design
  • Computer Science Applications

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