A reconfiguration-aware floorplacer for FPGAs

A. Montone*, F. Redaelli, M. D. Santambrogio, S. Ogrenci Memik

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

The goal of this paper is to introduce a partitioning and floorplanning algorithm tailored for reconfigurable architectures deployable on FPGAs. Our proposed algorithm specifically considers the feasibility of the associated communication infrastructure for a given floorplan. Different from existing approaches, our floorplanning algorithm takes specific physical constraints such as resource distribution and the granularity of reconfiguration possible for a given FPGA device into account. These physical constraints are typically considered at the later placement stage. In order to emphasize this fundamental difference with respect to traditional floorplanners, we refer to our approach as a floorplacer.

Original languageEnglish (US)
Title of host publicationProceedings - 2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008
Pages109-114
Number of pages6
DOIs
StatePublished - Dec 1 2008
Event2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008 - Cancun, Mexico
Duration: Dec 3 2008Dec 5 2008

Publication series

NameProceedings - 2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008

Other

Other2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008
Country/TerritoryMexico
CityCancun
Period12/3/0812/5/08

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software

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