A super-scheduler for embedded reconfigurable systems

S. Ogrenci Memik*, E. Bozorgzadeh, R. Kastner, M. Sarrafzadeh

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

36 Scopus citations


Emerging reconfigurable systems attain high performance with embedded optimized cores. For mapping designs on such special architectures, synthesis tools, that are aware of the special capabilities of the underlying architecture are necessary. In this paper we are proposing an algorithm to perform simultaneous scheduling and binding, targeting embedded reconfigurable systems. Our algorithm differs from traditional scheduling methods In Its capability of efficiently utilizing embedded blocks within the reconfigurable system. Our algorithm can be used to implement several other scheduling techniques, such as ASAP, ALAP, and list scheduling. Hence we refer to it as a super-scheduler. Our algorithm is a path-based scheduling algorithm. At each step, an individual path from the input DFG is scheduled. Our experiments with several DFG's extracted from MediaBench suit indicate promising results. Our scheduler presents capability to perform the trade-off between maximally utilizing the high-performance embedded blocks and exploiting parallelism in the schedule.

Original languageEnglish (US)
Pages (from-to)391-394
Number of pages4
JournalIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
StatePublished - 2001
EventInternational Conference on Computer-Aided Design 2001 - San Jose, CA, United States
Duration: Nov 4 2001Nov 8 2001

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design


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