A vlsi neuro-fuzzy controller

Nasser Sadati*, Hoorman Mohseni

*Corresponding author for this work

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

In this paper, a new analog neuro-fuzzy controller is presented. Standard CMOS technology was used for implementation of the building blocks. Internal architecture provides the trade-off between speed and the number of fuzzy rules and/or number of antecedents. Although the input signals, output signals and the processor circuits are all analog, the chip is digitally programmable. Analog processing permits the design of efficient circuits, which are low power, fast and very compact. In addition, since all the membership functions and fuzzy rules are digitally programmable, the controller can be used for a large variety of processes. For high speed and flexible defuzzification, a 3-layer neural network is used which can perform different methods of defuzzification: the center of gravity (COG), the mean of maxima (MOM), and so on. The proposed approach departs from other approaches, since it eliminates any need for division or normalizing feedback which are the speed bottlenecks of most previous work.

Original languageEnglish (US)
Pages (from-to)239-255
Number of pages17
JournalIntelligent Automation and Soft Computing
Volume5
Issue number3
DOIs
StatePublished - Jan 1 1999

Keywords

  • Fuzzy logic
  • Fuzzy systems
  • Neural chips
  • Neural network hardware
  • Neural networks
  • VLSI

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Computational Theory and Mathematics
  • Artificial Intelligence

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