An efficient retiming algorithm under setup and hold constraints

Chuan Lin*, Hai Zhou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

In this paper we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous work [17], which computed the minimum clock period in O(|V|3|E|lg |V|) time, our algorithm solves the same problem in O(|V|2|E|) time. Experimental results validate the efficiency of our algorithm.

Original languageEnglish (US)
Title of host publication2006 43rd ACM/IEEE Design Automation Conference, DAC'06
Pages945-950
Number of pages6
DOIs
StatePublished - Dec 1 2006

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Keywords

  • Retiming

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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