An execution environment for reconfigurable computing

W. Fu*, K. Compton

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

4 Scopus citations

Abstract

Although the benefits of software acceleration using reconfigurable logic have been demonstrated repeatedly, this style of computing has not yet penetrated the mainstream. One of the biggest unsolved problems is the management of the reconfigurable hardware in a multi-threaded environment. While most research in reconfigurable computing has assumed a single-threaded model, this is unrealistic for both personal computing and many types of embedded computing. In these cases, there may be several different threads running simultaneously. Each of these threads may have one or more sections of code (kernels) which would benefit from hardware acceleration. Somehow the operating system must decide at runtime which kernels to implement in software vs. hardware based on the status of the system. This includes potentially choosing from multiple possible hardware implementations (with different area/delay tradeoffs) of a single kernel. This paper examines our vision of reconfigurable computing applications in mainstream multithreaded systems, including a presentation of a proposed scheduling algorithm for allocating the reconfigurable hardware.

Original languageEnglish (US)
Pages267
Number of pages1
StatePublished - 2005
Externally publishedYes
EventACM/SIGDA Thirteenth ACM International Symposium on Field Programmable Gate Arrays - FPGA 2005 - Monterey, CA, United States
Duration: Feb 20 2005Feb 22 2005

Other

OtherACM/SIGDA Thirteenth ACM International Symposium on Field Programmable Gate Arrays - FPGA 2005
CountryUnited States
CityMonterey, CA
Period2/20/052/22/05

ASJC Scopus subject areas

  • Computer Science(all)

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