An Image Recognition Processor with Time-domain Accelerators using Efficient Time Encoding and Non-linear Logic Operation

Keyphrases

• Logic Operation 100%
• Image Recognition 100%
• Time Encoding 100%
• Linear Logic 100%
• Time-domain Signal Processing 100%
• Circuit Techniques 50%
• Scalable Design 50%
• Encoding Strategy 50%
• Time-sharing 50%
• Feature Extraction 50%
• Error Tolerance 50%
• Time-domain Techniques 50%
• Digital Implementation 50%
• Vector Quantization 50%
• Feature Vector 50%
• Prototype chip 50%
• Real-time Image Recognition 50%
• Time-domain Circuits 50%

Computer Science

• Vector Quantization 100%
• Domain Technique 100%
• Domain Circuit 100%
• Error Tolerance 100%
• Feature Vector 100%
• Feature Extraction 100%

Engineering

• Time Domain 100%
• Image Recognition 100%
• Domain Signal 50%
• Feature Extraction 25%
• Error Tolerance 25%
• Feature Vector 25%
• Vector Quantization 25%
• Time-domain Circuit 25%