An integrated approach to reducing power dissipation in memory hierarchies

Jayaprakash Pisharath*, Alok Choudhary

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

In recent years, both performance and power have become key factors in efficient memory design. In this paper, we propose a systematic approach to reduce the energy consumption of the entire memory hierarchy. We first evaluate an existing power-aware memory system where memory modules can exist in different power modes, and then propose on-chip memory module buffers, called Energy-Saver Buffers (ESB), which reside in-between the L2 cache and main memory. ESBs reduce the additional overhead incurred due to frequent resynchronization of the memory modules in a low-power state. An additional improvement is attained by using a model that dynamically resizes the active cache based on the varying needs of a program. Our experimental results demonstrate that an integrated approach can reduce the energy-delay product by as much as 50% when compared to a traditional non power-aware memory hierarchy.

Original languageEnglish (US)
Title of host publicationProceedings of the 2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02
Pages88-97
Number of pages10
DOIs
StatePublished - 2002
Event2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02 - Grenoble, France
Duration: Oct 8 2002Oct 11 2002

Publication series

NameProceedings of the 2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02

Other

Other2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02
CountryFrance
CityGrenoble
Period10/8/0210/11/02

Keywords

  • Dynamic cache
  • Energy-Saver Buffers (ESB)
  • Energy-delay product
  • Integrated approach
  • Power
  • RDRAM

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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