An integrated approach to thermal management in high-level synthesis

Rajarshi Mukherjee*, Seda Ogrenci Memik

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

21 Scopus citations

Abstract

Thermal effects are becoming an important factor in the design of integrated circuits due to the adverse impact of temperature on performance, reliability, leakage, and chip packaging costs. Making all phases of the design flow aware of this physical phenomenon helps in reaching faster design closure. In this paper, we present an integrated approach to thermal management in architectural synthesis. Our synthesis flow combines temperature-aware scheduling and binding based on feedback from thermal simulation. We show that our flow is effective in preventing hotspot formation and creating an even thermal profile of the resources. Our integrated thermal management technique on average reduces the peak temperature of the resources by 7.34°C when compared to a thermal unaware flow without increasing the number of resources across our set of benchmarks.

Original languageEnglish (US)
Pages (from-to)1165-1173
Number of pages9
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume14
Issue number11
DOIs
StatePublished - Nov 2006

Funding

Dr. Memik was the recipient of the National Science Foundation Early Career Development (CAREER) Award in 2006. Manuscript received June 30, 2005; revised January 30, 2006 and June 22, 2006. This work was supported in part by the National Science Foundation under Career Award 0546305. R. Mukherjee is with Synopsys, Inc., Mountain View, CA 94043 USA. S. O. Memik is with the Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL 60208 USA (e-mail: seda@ece. northwestern.edu). Digital Object Identifier 10.1109/TVLSI.2006.886408

Keywords

  • Architectural synthesis
  • Resource allocation
  • Resource assignment
  • Scheduling
  • Temperature

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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