Automatically accelerating non-numerical programs by architecture-compiler co-design

Simone Campanoni*, Kevin Brownell, Svilen Kanev, Gu Yeon Wei, David Brooks, Timothy M. Jones

*Corresponding author for this work

Research output: Contribution to journalReview articlepeer-review

1 Scopus citations

Abstract

Because of the high cost of communication between processors, compilers that parallelize loops automatically have been forced to skip a large class of loops that are both critical to performance and rich in latent parallelism. HELIX-RC is a compiler/microprocessor co-design that opens those loops to parallelization by decoupling communication from thread execution in conventional multicore architecures. Simulations of HELIX-RC, applied to a processor with 16 Intel Atom-like cores, show an average of 6.85× performance speedup for six SPEC CINT2000 benchmarks.

Original languageEnglish (US)
Pages (from-to)88-97
Number of pages10
JournalCommunications of the ACM
Volume60
Issue number12
DOIs
StatePublished - Dec 2017

ASJC Scopus subject areas

  • Computer Science(all)

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