B-HiVE: A bit-level history-based error model with value correlation for voltage-scaled integer and floating point units

G. Tziantzioulis, A. M. Gok, S. M. Faisal, N. Hardavellas, S. Ogrenci-Memik, S. Parthasarathy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Scopus citations

Abstract

Existing timing error models for voltage-scaled functional units ignore the effect of history and correlation among outputs, and the variation in the error behavior at different bit locations. We propose b-HiVE, a model for voltage-scaling-induced timing errors that incorporates these attributes and demonstrates their impact on the overall model accuracy. On average across several operations, b-HiVE's estimation is within 1-3% of comprehensive analog simulations, which corresponds to 5-17x higher accuracy (6-10x on average) than error models currently used in approximate computing research. To the best of our knowledge, we present the first bit-level error models of arithmetic units, and the first error models for voltage scaling of bitwise logic operations and floating-point units.

Original languageEnglish (US)
Title of host publication2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450335201
DOIs
StatePublished - Jul 24 2015
Event52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015 - San Francisco, United States
Duration: Jun 8 2015Jun 12 2015

Publication series

NameProceedings - Design Automation Conference
Volume2015-July
ISSN (Print)0738-100X

Other

Other52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015
CountryUnited States
CitySan Francisco
Period6/8/156/12/15

Keywords

  • Approximate Computing
  • Error Modeling
  • Voltage Scaling

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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    Tziantzioulis, G., Gok, A. M., Faisal, S. M., Hardavellas, N., Ogrenci-Memik, S., & Parthasarathy, S. (2015). B-HiVE: A bit-level history-based error model with value correlation for voltage-scaled integer and floating point units. In 2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015 [7167289] (Proceedings - Design Automation Conference; Vol. 2015-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/2744769.2744805