Buried-channel insulated gate fets on mocvd grown inp/ingaas/inp

E. A. Martin, K. P. Pande, M. A. Diforte-Poisson, C. Brylinski, G. Colomer, M. Razeghi

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

A novel heterojunction FET employing a buried channel is presented. Insulated-gate FETs have been fabricated on MOCVD grown InP/In0.53 Ga0.47 As. Plasma-enhanced CVD was used for the gate insulator deposition. These devices showed transconductances up to 90 mS/mm, and improved drain-current stability as compared with InP MISFETs employing SiO2.

Original languageEnglish (US)
Pages (from-to)352-356
Number of pages5
JournalProceedings of SPIE - The International Society for Optical Engineering
Volume797
DOIs
StatePublished - Apr 22 1987

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

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