Clock schedule verification under process variations

Ruiming Chen*, Hai Zhou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

With aggressive scaling down of feature sizes in VLSI fabrication, process variations have become a critical issue in designs, especially for high-performance ICs. Usually having level-sensitive latches for their speed, high-performance IC designs need to verify the clock schedules. With process variations, the verification needs to compute the probability of correct clocking. Because of complex statistical correlations, traditional iterative approaches are difficult to get accurate results. Instead, a statistical checking of the structural conditions for correct clocking is proposed, where the central problem is to compute the probability of having a positive cycle in a graph with random edge weights. The proposed method only traverses the graph once to avoid the correlations among iterations, and it considers not only data delay variations but also clock skew variations. Experimental results showed that the proposed approach has an error of 0.14% on average in comparisons with the Monte Carlo simulations.

Original languageEnglish (US)
Title of host publicationICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Pages619-625
Number of pages7
DOIs
StatePublished - Dec 1 2004
EventICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers - San Jose, CA, United States
Duration: Nov 7 2004Nov 11 2004

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN (Print)1092-3152

Other

OtherICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
CountryUnited States
CitySan Jose, CA
Period11/7/0411/11/04

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

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  • Cite this

    Chen, R., & Zhou, H. (2004). Clock schedule verification under process variations. In ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers (pp. 619-625). [8A.2] (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD). https://doi.org/10.1109/ICCAD.2004.1382650