Clock skew scheduling with delay padding for prescribed skew domains

Chuan Lin; Hai Zhou

doi:10.1109/ASPDAC.2007.358042

Clock skew scheduling with delay padding for prescribed skew domains

Chuan Lin^*, Hai Zhou

^*Corresponding author for this work

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

31 Scopus citations

Abstract

Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full optimization potential of clock skew scheduling can be reliably implemented using a few skew domains. In this paper we present an optimal skew scheduling algorithm for sequential circuits with flip-flops. Given a finite set of prescribed skew domains, the algorithm finds a domain assignment for each flip-flop such that the clock period is minimized with possible delay padding. Experimental results validate the efficiency of our algorithm and show 17% improvement on average in clock period.

Original language	English (US)
Title of host publication	Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
Pages	541-546
Number of pages	6
DOIs	https://doi.org/10.1109/ASPDAC.2007.358042
State	Published - 2007
Event	ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 - Yokohama, Japan Duration: Jan 23 2007 → Jan 27 2007

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
Country/Territory	Japan
City	Yokohama
Period	1/23/07 → 1/27/07

ASJC Scopus subject areas

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

Access to Document

10.1109/ASPDAC.2007.358042

Cite this

@inproceedings{56558fc7ff4f47d8b8b39aff9b933662,

title = "Clock skew scheduling with delay padding for prescribed skew domains",

abstract = "Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full optimization potential of clock skew scheduling can be reliably implemented using a few skew domains. In this paper we present an optimal skew scheduling algorithm for sequential circuits with flip-flops. Given a finite set of prescribed skew domains, the algorithm finds a domain assignment for each flip-flop such that the clock period is minimized with possible delay padding. Experimental results validate the efficiency of our algorithm and show 17% improvement on average in clock period.",

author = "Chuan Lin and Hai Zhou",

year = "2007",

doi = "10.1109/ASPDAC.2007.358042",

language = "English (US)",

isbn = "1424406293",

series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

pages = "541--546",

booktitle = "Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007",

note = "ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 ; Conference date: 23-01-2007 Through 27-01-2007",

}

Lin, C & Zhou, H 2007, Clock skew scheduling with delay padding for prescribed skew domains. in Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007., 4196088, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 541-546, ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007, Yokohama, Japan, 1/23/07. https://doi.org/10.1109/ASPDAC.2007.358042

Clock skew scheduling with delay padding for prescribed skew domains. / Lin, Chuan; Zhou, Hai.

Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007. 2007. p. 541-546 4196088 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Lin, Chuan

AU - Zhou, Hai

PY - 2007

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N2 - Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full optimization potential of clock skew scheduling can be reliably implemented using a few skew domains. In this paper we present an optimal skew scheduling algorithm for sequential circuits with flip-flops. Given a finite set of prescribed skew domains, the algorithm finds a domain assignment for each flip-flop such that the clock period is minimized with possible delay padding. Experimental results validate the efficiency of our algorithm and show 17% improvement on average in clock period.

AB - Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full optimization potential of clock skew scheduling can be reliably implemented using a few skew domains. In this paper we present an optimal skew scheduling algorithm for sequential circuits with flip-flops. Given a finite set of prescribed skew domains, the algorithm finds a domain assignment for each flip-flop such that the clock period is minimized with possible delay padding. Experimental results validate the efficiency of our algorithm and show 17% improvement on average in clock period.

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DO - 10.1109/ASPDAC.2007.358042

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T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

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BT - Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007

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Y2 - 23 January 2007 through 27 January 2007

ER -

Clock skew scheduling with delay padding for prescribed skew domains

Abstract

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ASJC Scopus subject areas

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