Compiler-Directed Scratch Pad Memory Optimization for Embedded Multiprocessors

Mahmut Kandemir*, Ismail Kadayif, Alok Choudhary, J. Ramanujam, Ibrahim Kolcu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

35 Scopus citations


This paper presents a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we propose an optimization algorithm that targets at reducing extra off-chip memory accesses caused by interprocessor communication. This is achieved by increasing the application-wide reuse of data that resides in scratch-pad memories of processors. Our results obtained using four array-intensive image processing applications indicate that exploiting interprocessor data sharing can reduce energy-delay product significantly on a four-processor embedded system.

Original languageEnglish (US)
Pages (from-to)281-287
Number of pages7
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number3
StatePublished - Mar 2004


  • Embedded systems
  • Loop-dominated applications
  • Scratch-pad memories (SPM)

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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