Design and analysis of a layer seven network processor accelerator using reconfigurable logic

Gokhan Memik, Seda Ogrenci Memik, William H. Mangione-Smith

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Scopus citations

Abstract

In this paper, we present an accelerator that is designed to improve performance of network processing applications, particularly layer seven networking applications. The accelerator can easily be integrated in Network Processors. We present the design details of two different FPGA implementations: a design where each task is implemented in the accelerator and another one where the accelerator must be partially reconfigured for different tasks. We also present novel algorithms for important tasks such as tree lookup and pattern matching that utilize the accelerator. We show that the accelerator improves the overall execution time by as much as 20-times for these tasks. We show that the accelerator can improve the execution time of a representative layer seven application by an order of magnitude. Finally, we discuss the effects of reconfiguration time and frequency over the performance of the accelerator.

Original languageEnglish (US)
Title of host publicationProceedings - 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2002
EditorsKenneth L. Pocek, Jeffrey Arnold
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages131-142
Number of pages12
ISBN (Electronic)076951801X
DOIs
StatePublished - Jan 1 2002
Event10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2002 - Napa, United States
Duration: Apr 22 2002Apr 24 2002

Publication series

NameIEEE Symposium on FPGAs for Custom Computing Machines, Proceedings
Volume2002-January
ISSN (Print)1082-3409

Other

Other10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2002
CountryUnited States
CityNapa
Period4/22/024/24/02

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Theoretical Computer Science

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    Memik, G., Memik, S. O., & Mangione-Smith, W. H. (2002). Design and analysis of a layer seven network processor accelerator using reconfigurable logic. In K. L. Pocek, & J. Arnold (Eds.), Proceedings - 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2002 (pp. 131-142). [1106668] (IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings; Vol. 2002-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPGA.2002.1106668