Design and implementation of active decoupling capacitor circuits for power supply regulation in digital ICs

Jie Gu*, Ramesh Harjani, Chris H. Kim

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

31 Scopus citations

Abstract

Control of on-chip power supply noise has become a major challenge for continuous scaling of CMOS technology. Conventional passive decoupling capacitors (decaps) exhibit significant area and leakage penalties. To improve the efficiency of power supply regulation, this paper proposes a distributed active decap circuit for use in digital integrated circuits (ICs). The proposed design uses an operational amplifier to boost the performance of conventional decaps. Simulations proved its enhanced decoupling effect in comparison with passive decaps. The proposed active decap also shows advantages in providing additional damping to the on-chip resonant noise. To verify the performance from the proposed circuit, a 0.18-$\mu$ m test chip with on-chip noise generators and sensors has been fabricated. Measurements show a 4-11$\times$ boost in decap value over conventional passive decaps for frequencies up to 1 GHz with a total area saving of 40%. Local supply noise distribution and decap gating capability were also examined from the test chip.

Original languageEnglish (US)
Pages (from-to)292-301
Number of pages10
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume17
Issue number2
DOIs
StatePublished - Feb 1 2009

Keywords

  • Circuit modeling
  • Integrated circuit (IC) design
  • Power supply noise

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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