Design and Synthesis of Self-Healing Memristive Circuits for Timing Resilient Processor Design

Shuyu Kong; Hai Zhou; Jie Gu

doi:10.1109/TVLSI.2018.2834827

Design and Synthesis of Self-Healing Memristive Circuits for Timing Resilient Processor Design

Shuyu Kong^*, Hai Zhou, Jie Gu

^*Corresponding author for this work

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

Modern microprocessors suffer from significant on-chip variation at the advanced technology nodes. The development of CMOS-compatible memristive devices has brought nonvolatile capability into silicon technology. This paper explores new applications for memristive devices to resolve performance degradations that result from process variation. Novel self-healing flip-flop and clock buffers are developed to automatically detect timing violation and to perform timing recovery by tuning the resistance values of memristor devices. To incorporate the circuit techniques into VLSI circuits design, novel device placement and tuning algorithms have been developed. The proposed design methodology is demonstrated in a 45-nm fast Fourier transform processor design. Our test results show that performance gains of up to 20% can be achieved using the proposed self-healing circuits, with only 1% area

Original language	English (US)
Article number	8368092
Pages (from-to)	2648-2660
Number of pages	13
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	26
Issue number	12
DOIs	https://doi.org/10.1109/TVLSI.2018.2834827
State	Published - Dec 2018

Keywords

Memristor
process variation
self-healing
sequential circuits
timing resilient

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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@article{b0fae02423f14e37a5d3f882dcf27c37,

title = "Design and Synthesis of Self-Healing Memristive Circuits for Timing Resilient Processor Design",

abstract = "Modern microprocessors suffer from significant on-chip variation at the advanced technology nodes. The development of CMOS-compatible memristive devices has brought nonvolatile capability into silicon technology. This paper explores new applications for memristive devices to resolve performance degradations that result from process variation. Novel self-healing flip-flop and clock buffers are developed to automatically detect timing violation and to perform timing recovery by tuning the resistance values of memristor devices. To incorporate the circuit techniques into VLSI circuits design, novel device placement and tuning algorithms have been developed. The proposed design methodology is demonstrated in a 45-nm fast Fourier transform processor design. Our test results show that performance gains of up to 20% can be achieved using the proposed self-healing circuits, with only 1% area",

keywords = "Memristor, process variation, self-healing, sequential circuits, timing resilient",

author = "Shuyu Kong and Hai Zhou and Jie Gu",

note = "Funding Information: Manuscript received September 2, 2017; revised January 12, 2018 and March 10, 2018; accepted April 25, 2018. Date of publication May 28, 2018; date of current version November 30, 2018. This work was supported in part by NSF under Grant CNS-1441695 and Grant CCF-1533656 and in part by SRC under Grant 2014-TS-2559. (Corresponding author: Shuyu Kong.) The authors are with the Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL 60208 USA (e-mail: shuyukong2020@u.northwestern.edu).",

year = "2018",

month = dec,

doi = "10.1109/TVLSI.2018.2834827",

language = "English (US)",

volume = "26",

pages = "2648--2660",

journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",

issn = "1063-8210",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "12",

}

TY - JOUR

T1 - Design and Synthesis of Self-Healing Memristive Circuits for Timing Resilient Processor Design

AU - Kong, Shuyu

AU - Zhou, Hai

AU - Gu, Jie

N1 - Funding Information: Manuscript received September 2, 2017; revised January 12, 2018 and March 10, 2018; accepted April 25, 2018. Date of publication May 28, 2018; date of current version November 30, 2018. This work was supported in part by NSF under Grant CNS-1441695 and Grant CCF-1533656 and in part by SRC under Grant 2014-TS-2559. (Corresponding author: Shuyu Kong.) The authors are with the Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL 60208 USA (e-mail: shuyukong2020@u.northwestern.edu).

PY - 2018/12

Y1 - 2018/12

N2 - Modern microprocessors suffer from significant on-chip variation at the advanced technology nodes. The development of CMOS-compatible memristive devices has brought nonvolatile capability into silicon technology. This paper explores new applications for memristive devices to resolve performance degradations that result from process variation. Novel self-healing flip-flop and clock buffers are developed to automatically detect timing violation and to perform timing recovery by tuning the resistance values of memristor devices. To incorporate the circuit techniques into VLSI circuits design, novel device placement and tuning algorithms have been developed. The proposed design methodology is demonstrated in a 45-nm fast Fourier transform processor design. Our test results show that performance gains of up to 20% can be achieved using the proposed self-healing circuits, with only 1% area

AB - Modern microprocessors suffer from significant on-chip variation at the advanced technology nodes. The development of CMOS-compatible memristive devices has brought nonvolatile capability into silicon technology. This paper explores new applications for memristive devices to resolve performance degradations that result from process variation. Novel self-healing flip-flop and clock buffers are developed to automatically detect timing violation and to perform timing recovery by tuning the resistance values of memristor devices. To incorporate the circuit techniques into VLSI circuits design, novel device placement and tuning algorithms have been developed. The proposed design methodology is demonstrated in a 45-nm fast Fourier transform processor design. Our test results show that performance gains of up to 20% can be achieved using the proposed self-healing circuits, with only 1% area

KW - Memristor

KW - process variation

KW - self-healing

KW - sequential circuits

KW - timing resilient

UR - http://www.scopus.com/inward/record.url?scp=85047644062&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85047644062&partnerID=8YFLogxK

U2 - 10.1109/TVLSI.2018.2834827

DO - 10.1109/TVLSI.2018.2834827

M3 - Article

AN - SCOPUS:85047644062

VL - 26

SP - 2648

EP - 2660

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SN - 1063-8210

IS - 12

M1 - 8368092

ER -

Design and Synthesis of Self-Healing Memristive Circuits for Timing Resilient Processor Design

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