Design issues for monolithic DC-DC converters

Surya Musunuri*, Patrick L. Chapman, Jun Zou, Chang Liu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

64 Scopus citations


This paper presents various ideas for integrating different components of dc-dc converter on to a silicon chip. These converters are intended to process power levels up to 0.5 W. Techniques for integrating capacitors and design issues for MOS transistors are discussed. The most complicated design issue involves inductors. Expressions for trace resistance and inductance estimation of on-chip planar spiral inductor on top metal layer of CMOS process are compared. These inductors have high series resistance due to low metal trace thickness, capacitive coupling with substrate and other metal traces, and eddy current loss. As an alternative, a CMOS compatible three-dimensional (3-D) surface micromachining technology known as plastic deformation magnetic assembly (PDMA) is used to fabricate high quality inductors with small footprints. Experimental results from a monolithic buck converter using this PDMA inductor are presented. A major conclusion of this work is that the 3-D "post-process" technology is more viable than traditional integrated circuit assembly methods for realizing of micro-power converters.

Original languageEnglish (US)
Pages (from-to)639-649
Number of pages11
JournalIEEE Transactions on Power Electronics
Issue number3
StatePublished - May 2005


  • DC-DC converters
  • Integrated power circuits and spiral inductor design

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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