Detailed analysis of carrier transport in InAs_0.3Sb _0.7 layers grown on GaAs substrates by metalorganic chemical-vapor deposition

InAs_0.3Sb_0.7 layers with mirrorlike morphology have been grown on GaAs substrates by low-pressure metalorganic chemical vapor deposition. A room-temperature electron Hall mobility of 2×10⁴ cm²/V s has been obtained for a 2-μm-thick layer. Low-temperature resistivity of the layers depended on TMIn flow rate and layer thickness. Hall mobility decreased monotonically with decreasing temperature below 300 K. A 77 K conductivity profile has shown an anomalous increase in the sample conductivity with decreasing thickness except in the near vicinity of the heterointerface. In order to interpret the experimental data, the effects of different scattering mechanisms on carrier mobility have been calculated, and the influences of the lattice mismatch and surface conduction on the Hall measurements have been investigated by applying a three-layer Hall-effect model. Experimental and theoretical results suggest that the combined effects of the dislocations generated by the large lattice mismatch and strong surface inversion may lead to deceptive Hall measurements by reflecting typical n-type behavior for a p-type sample, and the measured carrier concentration may considerably be affected by the surface conduction up to near room temperature. A quantitative analysis of dislocation scattering has shown significant degradation in electron mobility for dislocation densities above 10⁷ cm^-2. The effects of dislocation scattering on hole mobility have been found to be less severe. It has also been observed that there is a critical epilayer thickness (∼1 μm) below which the surface electron mobility is limited by dislocation scattering.