Detecting/preventing information leakage on the memory bus due to malicious hardware

Abhishek Das*, Gokhan Memik, Joseph Zambreno, Alok Nidhi Choudhary

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Scopus citations

Abstract

An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up these systems. Malicious circuitry can be inserted and hidden at several stages of the design process through the use of third-party Intellectual Property (IP), design tools, and manufacturing facilities. Such hardware Trojan circuitry has been shown to be capable of shutting down the main processor after a random number of cycles, broadcasting sensitive information over the bus, and bypassing software authentication mechanisms. In this work, we propose an architecture that can prevent information leakage due to such malicious hardware. Our technique is based on guaranteeing certain behavior in the memory system, which will be checked at an external guardian core that "approves" each memory request. By sitting between off-chip memory and the main core, the guardian core can monitor bus activity and verify the compiler-defined correctness of all memory writes. Experimental results on a conventional x86 platform demonstrate that application binaries can be statically reinstrumented to coordinate with the guardian core to monitor offchip access, resulting in less than 60% overhead for the majority of the studied benchmarks.

Original languageEnglish (US)
Title of host publicationDATE 10 - Design, Automation and Test in Europe
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages861-866
Number of pages6
ISBN (Print)9783981080162
DOIs
StatePublished - 2010
EventDesign, Automation and Test in Europe Conference and Exhibition, DATE 2010 - Dresden, Germany
Duration: Mar 8 2010Mar 12 2010

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

OtherDesign, Automation and Test in Europe Conference and Exhibition, DATE 2010
Country/TerritoryGermany
CityDresden
Period3/8/103/12/10

ASJC Scopus subject areas

  • General Engineering

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