Abstract
Tropical algebra solves complex problems with only sum and min/max operations replacing expensive multiplication and addition in linear algebra. Due to the low computing cost, tropical algebra has recently gained significant attention in a broad range of areas such as combinatorial optimization, scheduling, machine learning, etc. In this paper, we propose a generic hardware accelerator architecture for tropical algebra supporting a wide range of applications. Novel time-domain (TD) computing accelerators with special mapping, precision expansion and, unrolling techniques are proposed to further improve hardware efficiency. Test results on various tropical calculations including linear regression, dynamic programming, and neural network are shown to demonstrate an energy saving from 1.5X to 2.1X, latency saving from 2.6X to 5.2X, or an overall energy-delay-product (EDP) improvement from 3.9X-10.5X compared with conventional digital implementation manifesting the promise of the algebraic solution on low power edge devices.
Original language | English (US) |
---|---|
Title of host publication | 2023 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2023 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9798350311754 |
DOIs | |
State | Published - 2023 |
Event | 2023 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2023 - Vienna, Austria Duration: Aug 7 2023 → Aug 8 2023 |
Publication series
Name | Proceedings of the International Symposium on Low Power Electronics and Design |
---|---|
Volume | 2023-August |
ISSN (Print) | 1533-4678 |
Conference
Conference | 2023 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2023 |
---|---|
Country/Territory | Austria |
City | Vienna |
Period | 8/7/23 → 8/8/23 |
Funding
V. CONCLUSION In this work, a generic hardware accelerator architecture is proposed for tropical algebra. Energy efficient time domain computing circuits are further implemented to accelerate the min/max-sum calculations. For various applications, novel mapping methods are developed to support various problem size matching with the accelerator array size. Tropical precision expansion method is proposed to separate data into lower bit data with residual matrix to help reduce hardware cost, while maintaining data integrity. Special unrolling technique is also proposed in time domain that can reduce data conversion between digital and time domain. Experiments on a 65nm design show that for applications of linear regression, DTW, dynamic programming and neural network, an improvement from 1.5X to 2.1X for energy consumption and 2.6X to 5.2X saving for latency are achieved from the proposed design in comparison with conventional digital implementation. An overall energy-delay-product (EDP) improvement from 3.9X to 10.5X is also observed from our test results. VI. ACKNOWLEDGEMENTS This work was supported in part by NSF under grant number CCF-1846424.
Keywords
- dynamic programming
- shortest path problems
- time-domain computing
- tropical algebra
ASJC Scopus subject areas
- General Engineering