Digital compatible synthesis, placement and implementation of mixed-signal time-domain computing

Zhengyu Chen, Hai Zhou, Jie Gu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Mixed-signal time-domain computing (TC) has recently drawn significant attention due to its high efficiency in applications such as machine learning accelerators. However, due to the nature of analog and mixed-signal design, there is a lack of a systematic flow of synthesis and place & route for time-domain circuits. This paper proposed a comprehensive design flow for TC. In the front-end, a variation-aware digital compatible synthesis flow is proposed. In the back-end, a placement technique using graph-based optimization engine is proposed to deal with the especially stringent matching requirement in TC. Simulation results show significant improvement over the prior analog placement methods. A 55nm test chip is used to demonstrate that the proposed design flow can meet the stringent timing matching target for TC with significant performance boost over conventional digital design.

Original languageEnglish (US)
Title of host publicationProceedings of the 56th Annual Design Automation Conference 2019, DAC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450367257
DOIs
StatePublished - Jun 2 2019
Event56th Annual Design Automation Conference, DAC 2019 - Las Vegas, United States
Duration: Jun 2 2019Jun 6 2019

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference56th Annual Design Automation Conference, DAC 2019
CountryUnited States
CityLas Vegas
Period6/2/196/6/19

Fingerprint

Placement
Time Domain
Synthesis
Computing
Analogue
Particle accelerators
Learning systems
Accelerator
High Efficiency
Timing
Engines
Machine Learning
Engine
Chip
Networks (circuits)
Target
Design
Optimization
Requirements
Graph in graph theory

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

Cite this

Chen, Z., Zhou, H., & Gu, J. (2019). Digital compatible synthesis, placement and implementation of mixed-signal time-domain computing. In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019 [a67] (Proceedings - Design Automation Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/3316781.3317800
Chen, Zhengyu ; Zhou, Hai ; Gu, Jie. / Digital compatible synthesis, placement and implementation of mixed-signal time-domain computing. Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. (Proceedings - Design Automation Conference).
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Chen, Z, Zhou, H & Gu, J 2019, Digital compatible synthesis, placement and implementation of mixed-signal time-domain computing. in Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019., a67, Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc., 56th Annual Design Automation Conference, DAC 2019, Las Vegas, United States, 6/2/19. https://doi.org/10.1145/3316781.3317800

Digital compatible synthesis, placement and implementation of mixed-signal time-domain computing. / Chen, Zhengyu; Zhou, Hai; Gu, Jie.

Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. a67 (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Chen Z, Zhou H, Gu J. Digital compatible synthesis, placement and implementation of mixed-signal time-domain computing. In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. a67. (Proceedings - Design Automation Conference). https://doi.org/10.1145/3316781.3317800