Effect of Channel Width Variation on Electrical Characteristics of Double Lateral Gate Junctionless Transistors; A Numerical Study

Farhad Larki*, Arash Dehzangi, Md Shabiul Islam, Sawal Hamid Md Ali, Alam Abedini, Burhanuddin Yeop Majlis

*Corresponding author for this work

Research output: Contribution to journalArticle

3 Scopus citations

Abstract

In this paper, the effect of channel width variation on performance of double lateral gate junctionless transistors in the depletion and accumulation regimes is investigated. The characteristics of the device with various channel widths is comprehensively examined through analysis of on and off state current, threshold voltage (V th), transconductance (g m) and drain conductance (g D) variation in each operating regime. The carriers’ density distribution, electric field components and mobility are investigated through 3-D numerical simulations of the device to illustrate the variation of output characteristics. The results show that as the width decreases, the off-current (IOFF) decreases significantly as a result of better electrostatic control of the lateral gates over the channel. The on-current (ION) is also decreased mainly due to the doping-dependent mobility degradation.It is also indicated that between the flat-band and fully depleted (pinch off) variation of the majority carriers is the main parameter that modifies the characteristics of the device, while the mobility variation is recognized as the basic factor in the accumulation regime.

Original languageEnglish (US)
Pages (from-to)1305-1314
Number of pages10
JournalSilicon
Volume10
Issue number4
DOIs
StatePublished - Jul 1 2018

Keywords

  • 3D numerical simulations
  • Channel width
  • Junctionless transistors
  • Lateral gate

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials

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