Here we detail a complete process flow to overcome the challenge of placement of carbon nanotubes on solid surfaces, limiting "bottom-up", large-scale integration in semiconductor process technology. To date most bottom up placement strategies are based on surface functionalization having the drawback that chemical modifications can deteriorate the deposited carbon nanotubes. The application of dielectrophoretic techniques eliminates the chemical treatment, however, it necessitates the usage of conductive electrodes typically made out of metal. These metallic electrodes limit performance, scaling, and density of integrated electronic devices. Here, we report a method for electric-field assisted placement of purely semiconducting carbon nanotubes from solution at predefined locations by means of large-scale graphene layers having patterned nanoscale deposition sites. The patterned graphene layers can be removed residue-free after carbon nanotube deposition. In order to demonstrate the application potential, we have assembled at predefined substrate locations carbon nanotubes of varying density and integrated them into field-effect transistor. The graphene-based placement process, implemented with nanoscale resolution at wafer scale, could enable mass manufacturing of application-specific electronics based on carbon nanotubes.