Electronic transport in nanometre-scale silicon-on-insulator membranes

Pengpeng Zhang, Emma Tevaarwerk, Byoung Nam Park, Donald E. Savage, George K. Celler, Irena Knezevic, Paul G. Evans, Mark A. Eriksson, Max G. Lagally*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

162 Scopus citations


The widely used 'silicon-on-insulator' (SOI) system consists of a layer of single-crystalline silicon supported on a silicon dioxide substrate. When this silicon layer (the template layer) is very thin, the assumption that an effectively infinite number of atoms contributes to its physical properties no longer applies, and new electronic, mechanical and thermodynamic phenomena arise1-4, distinct from those of bulk silicon. The development of unusual electronic properties with decreasing layer thickness is particularly important for silicon microelectronic devices, in which (001)-oriented SOI is often used5-7. Here we show - using scanning tunnelling microscopy, electronic transport measurements, and theory - that electronic conduction in thin SOI(001) is determined not by bulk dopants but by the interaction of surface or interface electronic energy levels with the 'bulk' band structure of the thin silicon template layer. This interaction enables high-mobility carrier conduction in nanometre-scale SOI; conduction in even the thinnest membranes or layers of Si(001) is therefore possible, independent of any considerations of bulk doping, provided that the proper surface or interface states are available to enable the thermal excitation of 'bulk' carriers in the silicon layer.

Original languageEnglish (US)
Pages (from-to)703-706
Number of pages4
Issue number7077
StatePublished - Feb 9 2006

ASJC Scopus subject areas

  • General

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