Exploiting multi-grained parallelism in reconfigurable SBC architectures

Joseph Zambreno; Dan Honbo; Alok Choudhary

doi:10.1109/FCCM.2005.33

Exploiting multi-grained parallelism in reconfigurable SBC architectures

Joseph Zambreno^*, Dan Honbo, Alok Choudhary

^*Corresponding author for this work

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In recent years, reconfigurable technology has emerged as a popular choice for implementing various types of cryptographic functions. Nevertheless, an insufficient amount effort has been placed into fully exploiting the tremendous amounts of parallelism intrinsic to FPGAs for this class of algorithms. In this paper, we focus on block cipher architectures and explore design decisions that leverage the multi-grained parallelism inherent in many of these algorithms. We demonstrate the usefulness of this approach with a highly parallel FPGA implementation of the AES standard, and present results detailing the area/delay tradeoffs resulting from our design decisions.

Original language	English (US)
Title of host publication	Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005
Pages	333-334
Number of pages	2
DOIs	https://doi.org/10.1109/FCCM.2005.33
State	Published - Dec 1 2005
Event	13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005 - Napa, CA, United States Duration: Apr 18 2005 → Apr 20 2005

Publication series

Name	Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005
Volume	2005

Other

Other	13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005
Country/Territory	United States
City	Napa, CA
Period	4/18/05 → 4/20/05

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1109/FCCM.2005.33

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Zambreno, J., Honbo, D., & Choudhary, A. (2005). Exploiting multi-grained parallelism in reconfigurable SBC architectures. In Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005 (pp. 333-334). [1508578] (Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005; Vol. 2005). https://doi.org/10.1109/FCCM.2005.33

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title = "Exploiting multi-grained parallelism in reconfigurable SBC architectures",

abstract = "In recent years, reconfigurable technology has emerged as a popular choice for implementing various types of cryptographic functions. Nevertheless, an insufficient amount effort has been placed into fully exploiting the tremendous amounts of parallelism intrinsic to FPGAs for this class of algorithms. In this paper, we focus on block cipher architectures and explore design decisions that leverage the multi-grained parallelism inherent in many of these algorithms. We demonstrate the usefulness of this approach with a highly parallel FPGA implementation of the AES standard, and present results detailing the area/delay tradeoffs resulting from our design decisions.",

author = "Joseph Zambreno and Dan Honbo and Alok Choudhary",

year = "2005",

month = dec,

day = "1",

doi = "10.1109/FCCM.2005.33",

language = "English (US)",

isbn = "0769524451",

series = "Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005",

pages = "333--334",

booktitle = "Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005",

note = "13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005 ; Conference date: 18-04-2005 Through 20-04-2005",

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Zambreno, J, Honbo, D & Choudhary, A 2005, Exploiting multi-grained parallelism in reconfigurable SBC architectures. in Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005., 1508578, Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005, vol. 2005, pp. 333-334, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005, Napa, CA, United States, 4/18/05. https://doi.org/10.1109/FCCM.2005.33

Exploiting multi-grained parallelism in reconfigurable SBC architectures. / Zambreno, Joseph; Honbo, Dan; Choudhary, Alok.

Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005. 2005. p. 333-334 1508578 (Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - In recent years, reconfigurable technology has emerged as a popular choice for implementing various types of cryptographic functions. Nevertheless, an insufficient amount effort has been placed into fully exploiting the tremendous amounts of parallelism intrinsic to FPGAs for this class of algorithms. In this paper, we focus on block cipher architectures and explore design decisions that leverage the multi-grained parallelism inherent in many of these algorithms. We demonstrate the usefulness of this approach with a highly parallel FPGA implementation of the AES standard, and present results detailing the area/delay tradeoffs resulting from our design decisions.

AB - In recent years, reconfigurable technology has emerged as a popular choice for implementing various types of cryptographic functions. Nevertheless, an insufficient amount effort has been placed into fully exploiting the tremendous amounts of parallelism intrinsic to FPGAs for this class of algorithms. In this paper, we focus on block cipher architectures and explore design decisions that leverage the multi-grained parallelism inherent in many of these algorithms. We demonstrate the usefulness of this approach with a highly parallel FPGA implementation of the AES standard, and present results detailing the area/delay tradeoffs resulting from our design decisions.

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Exploiting multi-grained parallelism in reconfigurable SBC architectures

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