Exploiting on-chip data transfers for improving performance of chip-scale multiprocessors

G. Chen*, M. Kandemir, I. Kolcu, A. Choudhary

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on an on-chip multiprocessor where each processor has a local memory (or cache). We demonstrate that, in such an architecture, allowing each processor to do off-chip memory requests on behalf of other processors can improve overall performance over a straightforward strategy, where each processor performs off-chip requests independently. Our experimental results obtained using six benchmark codes indicate large execution cycle savings over a wide range of architectural configurations.

Original languageEnglish (US)
Pages (from-to)271-278
Number of pages8
JournalLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume2790
StatePublished - 2004

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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