Abstract
The performance of many applications, such as video streaming, webcam conferencing, and aerial surveillance, all greatly depend on video quality. A major issue with higher quality video is that either more data bandwidth or storage resources must be dedicated for transferring or storing the video. However, if the low-resolution video is transferred or stored in order to conserve data bandwidth and storage space, super-resolution is a viable solution that can be applied afterwards on the receiving end to rectify the poor quality of the low-resolution video. Super-resolution is an imaging technique that leverages motion blur and multiple low-resolution frames to construct a high-resolution frame. In our paper, we implement and analyze a super-resolution algorithm across multiple platforms ranging from purely hardware to purely software and even a mix of both hardware and software. More specifically, we examine the performance for a field-programmable gate array (FPGA) implementation on two different FPGAs, a software/hardware solution on a FPGA with a soft core processor, a general purpose graphics processing unit (GPGPU) implementation, and a MATLAB implementation. Overall, we found that the GPGPU provides the best overall performance with up to 29 FPS with 35 iterations of the super-resolution algorithm. A high-performance FPGA can have comparable performance and rival the GPGPU in some cases. One of the interesting results was that the hardware/software FPGA combination performed worse than the pure software implementation.
Original language | English (US) |
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Article number | 116 |
Journal | EURASIP Journal on Advances in Signal Processing |
Volume | 2013 |
Issue number | 1 |
DOIs | |
State | Published - 2013 |
Keywords
- Field programmable gate arrays
- Graphics processor
- High-resolution frame
- Streaming video
- Super-resolution algorithm
- Video processing
ASJC Scopus subject areas
- Signal Processing
- Information Systems
- Hardware and Architecture
- Electrical and Electronic Engineering