Abstract
This paper presents an algorithmic framework for fast and accurate static timing analysis considering coupling. With technology scaling to smaller dimensions, the impact of coupling induced delay variations can no longer be ignored. Timing analysis considering coupling is iterative, and can have considerably larger run-times than a single pass approach. We propose two different classes of coupling delay models: heuristic-based coupling model and current source-based coupling model, and present techniques to increase the convergence rate of timing analysis when such coupling models are employed. Our proposed coupling model show promising accuracy improvements compared to SPICE. Experimental results on ISCAS85 benchmarks validates the effectiveness of our efficient iteration scheme. Our iteration algorithm obtained speedups of up to 62.1% using a heuristic coupling model while 2.7× using a current-based coupling model in comparison to traditional approaches.
Original language | English (US) |
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Article number | 5352252 |
Pages (from-to) | 443-456 |
Number of pages | 14 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 19 |
Issue number | 3 |
DOIs | |
State | Published - Mar 2011 |
Keywords
- Algorithm
- crosstalk
- mathematical modeling
- signal integrity
- timing analysis
- timing verification
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering