Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access

Doris K.T. Ng; Jing Pu; Qian Wang; Kim Peng Lim; Yongqiang Wei; Yadong Wang; Yicheng Lai; Seng-Tiong Ho

doi:10.1117/12.2002786

Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access

Doris K.T. Ng, Jing Pu, Qian Wang, Kim Peng Lim, Yongqiang Wei, Yadong Wang, Yicheng Lai, Seng-Tiong Ho

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Silicon nanophotonic platform based on a silicon-on-insulator substrate enables dense photonic integration due to transparency for light propagation and ultra-high refractive index contrast for light confinement. Here, we integrate silicon together with III-V for high-efficiency heterogeneous Silicon/III-V and short vertical optical interconnect access. The fabrication involves 3 critical processes: 1) obtaining more than 80% maximum bonded areas of Si with III-V, 2) precise alignment of III-V nano-devices on top of the passive devices and 3) vertical sidewall etch profile of Si and III-V devices. The measurement results show around 90% coupling efficiency. The realization of this heterogeneous Si/III-V integration platform will open up enormous opportunities for photonic system on silicon through integrating various devices.

Original language	English (US)
Title of host publication	Optoelectronic Integrated Circuits XV
Volume	8628
DOIs	https://doi.org/10.1117/12.2002786
State	Published - May 30 2013
Event	Optoelectronic Integrated Circuits XV - San Francisco, CA, United States Duration: Feb 6 2013 → Feb 7 2013

Other

Other	Optoelectronic Integrated Circuits XV
Country	United States
City	San Francisco, CA
Period	2/6/13 → 2/7/13

Keywords

III-V
Optical waveguides
Photonics integration
Propagation losses

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Computer Science Applications
Applied Mathematics
Electrical and Electronic Engineering

Access to Document

10.1117/12.2002786

Fingerprint Dive into the research topics of 'Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access'. Together they form a unique fingerprint.

Cite this

Ng, D. K. T., Pu, J., Wang, Q., Lim, K. P., Wei, Y., Wang, Y., Lai, Y., & Ho, S-T. (2013). Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access. In Optoelectronic Integrated Circuits XV (Vol. 8628). [86280M] https://doi.org/10.1117/12.2002786

@inproceedings{68063ada56b440e1b8246836dc9e144c,

title = "Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access",

abstract = "Silicon nanophotonic platform based on a silicon-on-insulator substrate enables dense photonic integration due to transparency for light propagation and ultra-high refractive index contrast for light confinement. Here, we integrate silicon together with III-V for high-efficiency heterogeneous Silicon/III-V and short vertical optical interconnect access. The fabrication involves 3 critical processes: 1) obtaining more than 80% maximum bonded areas of Si with III-V, 2) precise alignment of III-V nano-devices on top of the passive devices and 3) vertical sidewall etch profile of Si and III-V devices. The measurement results show around 90% coupling efficiency. The realization of this heterogeneous Si/III-V integration platform will open up enormous opportunities for photonic system on silicon through integrating various devices.",

keywords = "III-V, Optical waveguides, Photonics integration, Propagation losses",

author = "Ng, {Doris K.T.} and Jing Pu and Qian Wang and Lim, {Kim Peng} and Yongqiang Wei and Yadong Wang and Yicheng Lai and Seng-Tiong Ho",

year = "2013",

month = may,

day = "30",

doi = "10.1117/12.2002786",

language = "English (US)",

isbn = "9780819493972",

volume = "8628",

booktitle = "Optoelectronic Integrated Circuits XV",

note = "Optoelectronic Integrated Circuits XV ; Conference date: 06-02-2013 Through 07-02-2013",

}

Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access. / Ng, Doris K.T.; Pu, Jing; Wang, Qian; Lim, Kim Peng; Wei, Yongqiang; Wang, Yadong; Lai, Yicheng; Ho, Seng-Tiong.

Optoelectronic Integrated Circuits XV. Vol. 8628 2013. 86280M.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Fabrication of high-efficiency heterogeneous Si/III-V integration with short optical vertical interconnect access

AU - Ng, Doris K.T.

AU - Pu, Jing

AU - Wang, Qian

AU - Lim, Kim Peng

AU - Wei, Yongqiang

AU - Wang, Yadong

AU - Lai, Yicheng

AU - Ho, Seng-Tiong

PY - 2013/5/30

Y1 - 2013/5/30

N2 - Silicon nanophotonic platform based on a silicon-on-insulator substrate enables dense photonic integration due to transparency for light propagation and ultra-high refractive index contrast for light confinement. Here, we integrate silicon together with III-V for high-efficiency heterogeneous Silicon/III-V and short vertical optical interconnect access. The fabrication involves 3 critical processes: 1) obtaining more than 80% maximum bonded areas of Si with III-V, 2) precise alignment of III-V nano-devices on top of the passive devices and 3) vertical sidewall etch profile of Si and III-V devices. The measurement results show around 90% coupling efficiency. The realization of this heterogeneous Si/III-V integration platform will open up enormous opportunities for photonic system on silicon through integrating various devices.

AB - Silicon nanophotonic platform based on a silicon-on-insulator substrate enables dense photonic integration due to transparency for light propagation and ultra-high refractive index contrast for light confinement. Here, we integrate silicon together with III-V for high-efficiency heterogeneous Silicon/III-V and short vertical optical interconnect access. The fabrication involves 3 critical processes: 1) obtaining more than 80% maximum bonded areas of Si with III-V, 2) precise alignment of III-V nano-devices on top of the passive devices and 3) vertical sidewall etch profile of Si and III-V devices. The measurement results show around 90% coupling efficiency. The realization of this heterogeneous Si/III-V integration platform will open up enormous opportunities for photonic system on silicon through integrating various devices.

KW - III-V

KW - Optical waveguides

KW - Photonics integration

KW - Propagation losses

UR - http://www.scopus.com/inward/record.url?scp=84878193854&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84878193854&partnerID=8YFLogxK

U2 - 10.1117/12.2002786

DO - 10.1117/12.2002786

M3 - Conference contribution

AN - SCOPUS:84878193854

SN - 9780819493972

VL - 8628

BT - Optoelectronic Integrated Circuits XV

T2 - Optoelectronic Integrated Circuits XV

Y2 - 6 February 2013 through 7 February 2013

ER -