Fast min-cost buffer insertion under process variations

Ruiming Chen*, Hai Zhou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

Process variation has become a critical problem in modern VLSI fabrication. In the presence of process variation, buffer insertion problem under performance constraints becomes more difficult since the solution space expands greatly. We propose efficient dynamic programming approaches to handle the min-cost buffer insertion under process variations. Our approaches handle delay constraints and slew constraints, in trees and in combinational circuits. The experimental results demonstrate that in general, process variations have great impact on slew-constrained buffering, but much less impact on delay-constrained buffering, especially for small nets. Our approaches have less than 9% runtime overhead on average compared with a single pass of deterministic buffering for delay constrained buffering, and get 56% yield improvement and 11.8% buffer area reduction, on average, for slew constrained buffering.

Original languageEnglish (US)
Title of host publication2007 44th ACM/IEEE Design Automation Conference, DAC'07
Pages338-343
Number of pages6
DOIs
StatePublished - Aug 2 2007
Event2007 44th ACM/IEEE Design Automation Conference, DAC'07 - San Diego, CA, United States
Duration: Jun 4 2007Jun 8 2007

Other

Other2007 44th ACM/IEEE Design Automation Conference, DAC'07
CountryUnited States
CitySan Diego, CA
Period6/4/076/8/07

Keywords

  • Buffer insertion
  • Statistical optimization
  • Variation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

Fingerprint Dive into the research topics of 'Fast min-cost buffer insertion under process variations'. Together they form a unique fingerprint.

Cite this