Field effect in silicon nanostructure fabricated by Atomic Force Microscopy nano lithography

Arash Dehzangi*, Farhad Larki, E. B. Saion, Sabar D. Hutagalung, M. N. Hamidon, Jumiah Hassan

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

The electrical property of silicon nano-structure is highly considered in nanoelectronics. In this context we investigate the field effect in nanostructure Junctionless p-type silicon nanowire transistor under the lateral gate voltage. The device fabricated by means of Atomic Force microscopy (AFM) nano lithography on Silicon on Insulator (SOI) wafer. I-V characteristic and the Drain/Source current under the lateral gate voltage investigated. The subthreshold swing measured and hysteresis effect observed for the old sample compared to new one.

Original languageEnglish (US)
Title of host publication2011 IEEE Regional Symposium on Micro and Nanoelectronics, RSM 2011 - Programme and Abstracts
Pages104-107
Number of pages4
DOIs
StatePublished - 2011
Event2011 IEEE Regional Symposium on Micro and Nano Electronics, RSM 2011 - Kota Kinabalu, Sabah, Malaysia
Duration: Sep 28 2011Sep 30 2011

Publication series

Name2011 IEEE Regional Symposium on Micro and Nanoelectronics, RSM 2011 - Programme and Abstracts

Other

Other2011 IEEE Regional Symposium on Micro and Nano Electronics, RSM 2011
Country/TerritoryMalaysia
CityKota Kinabalu, Sabah
Period9/28/119/30/11

Keywords

  • Atomic Force Microscopy nano lithography
  • Field effect
  • Local Anodic Oxidation
  • P-type Silicon Nanowire transistor
  • Silicon on insulator SOI

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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