FPGA hardware synthesis from MATLAB

Malay Haldar, Anshuman Nayak Nagrajshenoy, Nagraj Shenoy, Alok Nidhi Choudhary, Prith Banerjee

Research output: Contribution to journalArticlepeer-review

19 Scopus citations

Abstract

Field Programmable Gate Arrays (FPGAs) have been recently used as an effective platform for implementing many image/signal processing applications. MATLAB is one of the most popular languages to model image/signal processing applications. We present the MATCH compiler that takes MATLAB as input and produces a hardware in RTL VHDL, which can be mapped to an FPGA using commercial CAD tools. This dramatically reduces the time to implement an application on an FPGA. We present results on some image and signal processing algorithms for which hardware was synthesized using our compiler for the Xilinx XC4028 FPGA with an external memory. We also present comparisons with manually designed hardwares for the applications. Our results indicate that FPGA hardware can be generated automatically reducing the design time from days to minutes, with the tradeoff that the automatically generated hardware is 5 times slower than the manually designed hardware.

Original languageEnglish (US)
Pages (from-to)299-304
Number of pages6
JournalProceedings of the IEEE International Conference on VLSI Design
DOIs
StatePublished - 2001

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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