Gate-tunable memristive phenomena mediated by grain boundaries in single-layer MoS2

Vinod K. Sangwan, Deep Jariwala, In Soo Kim, Kan Sheng Chen, Tobin J. Marks, Lincoln J. Lauhon*, Mark C. Hersam

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

341 Scopus citations


Continued progress in high-speed computing depends on breakthroughs in both materials synthesis and device architectures1-4. The performance of logic and memory can be enhanced significantly by introducing a memristor5,6, a two-terminal device with internal resistance that depends on the history of the external bias voltage5-7. State-of-the-art memristors, based on metal-insulator-metal (MIM) structures with insulating oxides, such as TiO2, are limited by a lack of control over the filament formation and external control of the switching voltage3,4,6,8,9. Here, we report a class of memristors based on grain boundaries (GBs) in single-layer MoS2 devices10-12. Specifically, the resistance of GBs emerging from contacts can be easily and repeatedly modulated, with switching ratios up to ∼103 and a dynamic negative differential resistance (NDR). Furthermore, the atomically thin nature of MoS2 enables tuning of the set voltage by a third gate terminal in a field-effect geometry, which provides new functionality that is not observed in other known memristive devices.

Original languageEnglish (US)
Pages (from-to)403-406
Number of pages4
JournalNature nanotechnology
Issue number5
StatePublished - May 7 2015

ASJC Scopus subject areas

  • Bioengineering
  • Atomic and Molecular Physics, and Optics
  • Biomedical Engineering
  • Materials Science(all)
  • Condensed Matter Physics
  • Electrical and Electronic Engineering


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