Gate-tunable memristors from monolayer MoS2

Vinod K. Sangwan, Hong Sub Lee, Mark C. Hersam*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations


We report here gate-tunable memristors based on monolayer MoS2 grown by chemical vapor deposition (CVD). These memristors are fabricated in a field-effect geometry with the channel consisting of poly crystalline MoS2 films with grain sizes of 3-5 μm. The device characteristics show switching ratios up to ∼500, with the resistance in individual states being continuously gate-tunable by over three orders of magnitude. The resistive switching results from dynamically varying threshold voltage and Schottky barrier heights, whose underlying physical mechanism appears to be vacancy migration and/or charge trapping. Top-gated devices achieve reversible tuning of threshold voltage, with potential utility in non-volatile memory or neuromorphic architectures.

Original languageEnglish (US)
Title of host publication2017 IEEE International Electron Devices Meeting, IEDM 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538635599
StatePublished - Jan 23 2018
Event63rd IEEE International Electron Devices Meeting, IEDM 2017 - San Francisco, United States
Duration: Dec 2 2017Dec 6 2017

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918


Other63rd IEEE International Electron Devices Meeting, IEDM 2017
Country/TerritoryUnited States
CitySan Francisco

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry


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