Due to the scaling down of device geometry and increasing frequency m deep sub-micron designs, crosstalk between interconnection wires has become an important issue in VLSI layout design. In this paper, we consider crosstalk avoidance during global routing. We present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. We also give theoretical results on the complexity of the problem.
|Original language||English (US)|
|Number of pages||4|
|Journal||Proceedings - Design Automation Conference|
|State||Published - Jan 1 1998|
ASJC Scopus subject areas
- Hardware and Architecture
- Control and Systems Engineering