Abstract
This paper presents a distributed multi-chip human activity recognition system for Virtual Reality (VR) and Augmented Reality (AR) applications. A comprehensive solution is delivered including AI core for classification, analog sensing for neural activity detection and infrared data communication for multi-chip collaboration. A 65nm test chip is fabricated and distributed across the body area to demonstrate the low power, low latency, and camera-free features of the target applications.
| Original language | English (US) |
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| Title of host publication | 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9784863488069 |
| DOIs | |
| State | Published - 2023 |
| Event | 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 - Kyoto, Japan Duration: Jun 11 2023 → Jun 16 2023 |
Publication series
| Name | Digest of Technical Papers - Symposium on VLSI Technology |
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| Volume | 2023-June |
| ISSN (Print) | 0743-1562 |
Conference
| Conference | 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 |
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| Country/Territory | Japan |
| City | Kyoto |
| Period | 6/11/23 → 6/16/23 |
Funding
Acknowledgements This work was supported by the National Science Foundation under CNS-1816870 and CCF-2208573. References [1] H. Chen et al. SMC, 2017. [2] J. Auda et al. CHI, 2019. [3] A. R. Aslam et al. CICC, 2020. [4] J. Liu et al. ISSCC, 2021. [5] H. Bhamra et al. JSSC, 2015. [6] L. Xia et al., JSSC, 2014.
ASJC Scopus subject areas
- Electrical and Electronic Engineering