Improving locality using loop and data transformations in an integrated framework

M. Kandemir*, Alok Nidhi Choudhary, J. Ramanujam, P. Banerjee

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

74 Scopus citations


This paper presents a new integrated compiler framework for improving the cache performance of scientific applications. In addition to applying loop transformations, the method includes data layout optimizations, i.e., those that change the memory layouts of data structures (arrays in this case). A key characteristic of this approach is that loop transformations are used to improve temporal locality while data layout optimizations are used to improve spatial locality. This optimization framework was used with sixteen loop nests from several benchmarks and math libraries, and the performance was measured using a cache simulator in addition to using a single node of the SGI Origin 2000 distributed-shared-memory machine for measuring actual execution times. The results demonstrate that this approach is very effective in improving locality and outperforms current solutions that use either loop or data transformations alone. We expect that our solution will also enable better register usage due to increased temporal locality in the innermost loop, and that it will help in eliminating false-sharing on multiprocessors due to exploiting spatial locality in the innermost loop.

Original languageEnglish (US)
Pages (from-to)285-296
Number of pages12
JournalProceedings of the Annual International Symposium on Microarchitecture
StatePublished - Dec 1 1998
EventProceedings of the 1998 31st Annual ACM/IEEE International Symposium on Microarchitecture - Dallas, TX, USA
Duration: Nov 30 1998Dec 2 1998

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software


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