Interface Engineering with Polystyrene for High-Performance, Low-Voltage Driven Organic Thin Film Transistor

Md Mehedi Hasan; Md Mobaidul Islam; Xiuling Li; Mingqian He; Robert Manley; Jaemyung Chang; Nikolay Zhelev; Karan Mehrotra; Jin Jang

doi:10.1109/TED.2020.2974980

Interface Engineering with Polystyrene for High-Performance, Low-Voltage Driven Organic Thin Film Transistor

Md Mehedi Hasan, Md Mobaidul Islam, Xiuling Li, Mingqian He, Robert Manley, Jaemyung Chang, Nikolay Zhelev, Karan Mehrotra, Jin Jang^*

^*Corresponding author for this work

Physics and Astronomy

Research output: Contribution to journal › Article › peer-review

18 Scopus citations

Abstract

We report a solution-processed, high-performance organic thin-film transistor (OTFT), using polystyrene (PS) as interlayer with the semiconducting material P2TDPP2TFT4 as an active layer. We achieved a significant improvement employing the PS as an interlayer between the P2TDPP2TFT4 and {{{\text {AlO}}}}_{X} gate insulator. The filed-effect mobility ( \mu _{{{\text {FE}}}} ) and ON/OFF current ratio {(}{I}_{{ \mathrm{\scriptscriptstyle ON}}}/{I}_{{ \mathrm{\scriptscriptstyle OFF}}}{)} reached to 0.82\,\,{{{\text {cm}}}}^{{{{2}}}}{\cdot } {{\text {V}}}^{{{-{1}}}}{\cdot } {{\text {s}}}^{{{-{1}}}} and 10⁵, respectively, which is higher than the devices fabricated with commonly used self-assembled monolayer (SAM) octadecyltrimethoxysilane (OTS) modified substrate under similar experimental conditions. Further analysis of the modified gate insulator utilizing atomic force microscopy, X-ray diffraction, and contact angle measurement revealed that smoother surface and lower surface energy were achieved by employing PS interlayer, which leads to more compatible surface energy with the semiconductor and interfacial trap passivation. Passivation of interfacial traps and lower surface energy using PS interlayer leads to the highly stable device performance, suggesting its application as a new interlayer with {{{\text {AlO}}}}_{X} gate insulator to improve device performance.

Original language	English (US)
Article number	9034506
Pages (from-to)	1751-1756
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	67
Issue number	4
DOIs	https://doi.org/10.1109/TED.2020.2974980
State	Published - Apr 2020

Funding

Manuscript received January 20, 2020; revised February 11, 2020; accepted February 16, 2020. Date of publication March 12, 2020; date of current version March 24, 2020. This work was supported in part by the Ministry of Trade, Industry and Energy (MOTIE) under Grant 10052044 and in part by the Korea Display Research Corporation (KDRC) Support Program for the development of future devices technology for display industry. The review of this article was arranged by Editor H. Klauk. (Corresponding author: Jin Jang.) Md. Mehedi Hasan, Md. Mobaidul Islam, Xiuling Li, and Jin Jang are with the Advanced Display Research Center, Kyung Hee University, Seoul 02447, South Korea, and also with the Department of Information Display, Kyung Hee University, Seoul 02447, South Korea (e-mail: [email protected]; [email protected]).

Keywords

Interlayer
Octadecyltrimethoxysilane (OTS)
Organic semiconductor
Polystyrene (PS)
Thin-film transistor (TFT)

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/TED.2020.2974980

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@article{c42af30cb1074634bd4582efdc4d6256,

title = "Interface Engineering with Polystyrene for High-Performance, Low-Voltage Driven Organic Thin Film Transistor",

abstract = "We report a solution-processed, high-performance organic thin-film transistor (OTFT), using polystyrene (PS) as interlayer with the semiconducting material P2TDPP2TFT4 as an active layer. We achieved a significant improvement employing the PS as an interlayer between the P2TDPP2TFT4 and {{{\text {AlO}}}}_{X} gate insulator. The filed-effect mobility ( \mu _{{{\text {FE}}}} ) and ON/OFF current ratio {(}{I}_{{ \mathrm{\scriptscriptstyle ON}}}/{I}_{{ \mathrm{\scriptscriptstyle OFF}}}{)} reached to 0.82\,\,{{{\text {cm}}}}^{{{{2}}}}{\cdot } {{\text {V}}}^{{{-{1}}}}{\cdot } {{\text {s}}}^{{{-{1}}}} and 105, respectively, which is higher than the devices fabricated with commonly used self-assembled monolayer (SAM) octadecyltrimethoxysilane (OTS) modified substrate under similar experimental conditions. Further analysis of the modified gate insulator utilizing atomic force microscopy, X-ray diffraction, and contact angle measurement revealed that smoother surface and lower surface energy were achieved by employing PS interlayer, which leads to more compatible surface energy with the semiconductor and interfacial trap passivation. Passivation of interfacial traps and lower surface energy using PS interlayer leads to the highly stable device performance, suggesting its application as a new interlayer with {{{\text {AlO}}}}_{X} gate insulator to improve device performance.",

keywords = "Interlayer, Octadecyltrimethoxysilane (OTS), Organic semiconductor, Polystyrene (PS), Thin-film transistor (TFT)",

author = "Hasan, {Md Mehedi} and Islam, {Md Mobaidul} and Xiuling Li and Mingqian He and Robert Manley and Jaemyung Chang and Nikolay Zhelev and Karan Mehrotra and Jin Jang",

note = "Funding Information: Manuscript received January 20, 2020; revised February 11, 2020; accepted February 16, 2020. Date of publication March 12, 2020; date of current version March 24, 2020. This work was supported in part by the Ministry of Trade, Industry and Energy (MOTIE) under Grant 10052044 and in part by the Korea Display Research Corporation (KDRC) Support Program for the development of future devices technology for display industry. The review of this article was arranged by Editor H. Klauk. (Corresponding author: Jin Jang.) Md. Mehedi Hasan, Md. Mobaidul Islam, Xiuling Li, and Jin Jang are with the Advanced Display Research Center, Kyung Hee University, Seoul 02447, South Korea, and also with the Department of Information Display, Kyung Hee University, Seoul 02447, South Korea (e-mail: [email protected]; [email protected]). Publisher Copyright: {\textcopyright} 1963-2012 IEEE.",

year = "2020",

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doi = "10.1109/TED.2020.2974980",

language = "English (US)",

volume = "67",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - Interface Engineering with Polystyrene for High-Performance, Low-Voltage Driven Organic Thin Film Transistor

AU - Hasan, Md Mehedi

AU - Islam, Md Mobaidul

AU - Li, Xiuling

AU - He, Mingqian

AU - Manley, Robert

AU - Chang, Jaemyung

AU - Zhelev, Nikolay

AU - Mehrotra, Karan

AU - Jang, Jin

N1 - Funding Information: Manuscript received January 20, 2020; revised February 11, 2020; accepted February 16, 2020. Date of publication March 12, 2020; date of current version March 24, 2020. This work was supported in part by the Ministry of Trade, Industry and Energy (MOTIE) under Grant 10052044 and in part by the Korea Display Research Corporation (KDRC) Support Program for the development of future devices technology for display industry. The review of this article was arranged by Editor H. Klauk. (Corresponding author: Jin Jang.) Md. Mehedi Hasan, Md. Mobaidul Islam, Xiuling Li, and Jin Jang are with the Advanced Display Research Center, Kyung Hee University, Seoul 02447, South Korea, and also with the Department of Information Display, Kyung Hee University, Seoul 02447, South Korea (e-mail: [email protected]; [email protected]). Publisher Copyright: © 1963-2012 IEEE.

PY - 2020/4

Y1 - 2020/4

N2 - We report a solution-processed, high-performance organic thin-film transistor (OTFT), using polystyrene (PS) as interlayer with the semiconducting material P2TDPP2TFT4 as an active layer. We achieved a significant improvement employing the PS as an interlayer between the P2TDPP2TFT4 and {{{\text {AlO}}}}_{X} gate insulator. The filed-effect mobility ( \mu _{{{\text {FE}}}} ) and ON/OFF current ratio {(}{I}_{{ \mathrm{\scriptscriptstyle ON}}}/{I}_{{ \mathrm{\scriptscriptstyle OFF}}}{)} reached to 0.82\,\,{{{\text {cm}}}}^{{{{2}}}}{\cdot } {{\text {V}}}^{{{-{1}}}}{\cdot } {{\text {s}}}^{{{-{1}}}} and 105, respectively, which is higher than the devices fabricated with commonly used self-assembled monolayer (SAM) octadecyltrimethoxysilane (OTS) modified substrate under similar experimental conditions. Further analysis of the modified gate insulator utilizing atomic force microscopy, X-ray diffraction, and contact angle measurement revealed that smoother surface and lower surface energy were achieved by employing PS interlayer, which leads to more compatible surface energy with the semiconductor and interfacial trap passivation. Passivation of interfacial traps and lower surface energy using PS interlayer leads to the highly stable device performance, suggesting its application as a new interlayer with {{{\text {AlO}}}}_{X} gate insulator to improve device performance.

AB - We report a solution-processed, high-performance organic thin-film transistor (OTFT), using polystyrene (PS) as interlayer with the semiconducting material P2TDPP2TFT4 as an active layer. We achieved a significant improvement employing the PS as an interlayer between the P2TDPP2TFT4 and {{{\text {AlO}}}}_{X} gate insulator. The filed-effect mobility ( \mu _{{{\text {FE}}}} ) and ON/OFF current ratio {(}{I}_{{ \mathrm{\scriptscriptstyle ON}}}/{I}_{{ \mathrm{\scriptscriptstyle OFF}}}{)} reached to 0.82\,\,{{{\text {cm}}}}^{{{{2}}}}{\cdot } {{\text {V}}}^{{{-{1}}}}{\cdot } {{\text {s}}}^{{{-{1}}}} and 105, respectively, which is higher than the devices fabricated with commonly used self-assembled monolayer (SAM) octadecyltrimethoxysilane (OTS) modified substrate under similar experimental conditions. Further analysis of the modified gate insulator utilizing atomic force microscopy, X-ray diffraction, and contact angle measurement revealed that smoother surface and lower surface energy were achieved by employing PS interlayer, which leads to more compatible surface energy with the semiconductor and interfacial trap passivation. Passivation of interfacial traps and lower surface energy using PS interlayer leads to the highly stable device performance, suggesting its application as a new interlayer with {{{\text {AlO}}}}_{X} gate insulator to improve device performance.

KW - Interlayer

KW - Octadecyltrimethoxysilane (OTS)

KW - Organic semiconductor

KW - Polystyrene (PS)

KW - Thin-film transistor (TFT)

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Interface Engineering with Polystyrene for High-Performance, Low-Voltage Driven Organic Thin Film Transistor

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