Abstract
As the feature size keeps scaling down and the circuit complexity increases rapidly, a more advanced hybrid lithography, which combines multiple patterning and electron-beam lithography (EBL), is promising to further enhance the pattern resolution. In this paper, we formulate the layout decomposition problem for this hybrid lithography as a minimum vertex deletion K-partition problem, where K is the number of masks in multiple patterning. Stitch minimization and EBL throughput are considered uniformly by adding a virtual vertex between two feature vertices for each stitch candidate during the conflict graph construction phase. For K=2 , we propose a primal-dual (PD) method for solving the underlying minimum odd-cycle cover problem efficiently. In addition, a chain decomposition algorithm is employed for removing all 'noncyclable' edges. Furthermore, we investigate two versions of the PD method, one with planarization and one without. For K>2 , we propose a random-initialized local search method that iteratively applies the PD solver. Experimental results show that compared with a two-stage method, our proposed methods reduce the EBL usage by 65.5% with double patterning and 38.7% with triple patterning on average for the benchmarks.
Original language | English (US) |
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Article number | 7368163 |
Pages (from-to) | 1532-1545 |
Number of pages | 14 |
Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Volume | 35 |
Issue number | 9 |
DOIs | |
State | Published - Sep 2016 |
Funding
National Science Foundation under Grant CCF-1115550, Grant CCF-1218906, and Grant CNS-1441695
Keywords
- Electron-beam (E-beam)
- graph bipartization
- hybrid lithography
- layout decomposition
- multiple patterning
- primal-dual (PD)
ASJC Scopus subject areas
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering